Prior to reducing an integrated circuit design to a form suitable for fabrication, the integrated circuit design is often simulated in software on a computer, and emulated in hardware to allow the design to be optimized and debugged. Typically, using a hardware description language (e.g., VHDL), the circuit designer prepares a hardware description of the integrated circuit, which is then compiled into a software model to be simulated on a computer (e.g., an engineering workstation). Often, the hardware description can also be compiled into a hardware model that can be emulated in a hardware emulator. A hardware emulator suitable for such use typically includes field programmable gate arrays (FPGAs) that serve as a breadboard for implementing the integrated circuit design. Both the simulation and the emulator typically run at a slower speed than a computer network (e.g., an Ethernet network).
When an integrated circuit that has a computer network interface is simulated or emulated, network activities are usually simulated or emulated at the speed of the circuit emulator or the circuit simulation. When using a circuit emulator, a conventional network-emulation device is typically connected to a port of the circuit emulator. The circuit emulator receives data packets from the network-emulation device, re-packages the data and transmits the re-packaged data back at the speed of the circuit emulator. The re-packaged data is then received by the network-emulation device, which inspects the re-packaged data to determine if the integrated circuit under emulation in the circuit emulator correctly sends and receives data packets. However, on balance, such a conventional network-emulation device does not emulate network behavior accurately and correctly.
Alternatively, another conventional technique for connecting a circuit emulator to the network requires slowing down the network, receiving signals from the slowed network and translating the signals into suitable electrical signals in the form that the circuit emulator can accept. The circuit emulator, which typically operates at a slower speed than the network, can also send packets to the slowed network. However, because the network is designed to operate at a different speed, timing issues may arise in such a slowed network. These timing issues may require further modification to the network to resolve. Such modifications are undesirable because the modified network may not adequately represent network characteristics. Because not all network devices can be slowed to the circuit emulator speed, the circuit emulator is typically also limited to communication with a small subset of devices on the network.
Shortcomings of an emulation are typically also present in a logic circuit simulation.